Control system and method for dual active bridge DC/DC converters

ABSTRACT

Control system and method for controlling power flow in dual active bridge converters. The control system comprises a compensator, a feedback unit, and a modulator. An outer loop provides a reference signal. The output of the compensator are the control parameters for the modulator. The feedback unit samples the transformer current once every half switching cycle to thereby determine a power level. The power level is used to determine a modulation technique to apply. The modulation technique is one of phase-shift modulation (PSM), variable duty cycle modulation (VDM), or triangular current mode modulation (TCM).

RELATED APPLICATIONS

This application is a Non-Provisional Patent application which claims the benefit of U.S. Provisional Application No. 63/050,386 filed Jul. 10, 2020.

TECHNICAL FIELD

The present invention relates to dual active bridge (DAB) DC/DC converters. More specifically, the present invention relates to controlling current and voltage in circuits that include DAB converters.

BACKGROUND

Bidirectional DC/DC converters are used in many applications where bidirectional power flow is required, such as uninterruptible power supplies (UPSs), electric vehicles (EVs), vehicle-to-grid (V2G) and grid-to-vehicle (G2V) systems, and energy storage systems. In particular, battery charging applications must be capable of operating in wide range of load conditions. Because of this, converters capable of achieving stable and robust operation over the entire load range are required.

One of the most prominent bidirectional DC/DC converters is the dual active bridge (DAB) power converter. Typical control systems for DAB converters are closed-loop feedback systems that include a compensator and a modulator. The modulator creates switching signals based on four controllable parameters of a current in the DAB converter. These parameters are identified from an output of the compensator, which receives a current signal from the DAB converter and compensates for error in the current signal. Four control parameters are typically used: phase-shift (φ), duty cycle of bridge A (D_(A)), duty cycle of bridge B (D_(B)), and switching frequency (f_(s)).

FIG. 1 depicts a conventional control method according to the prior art. As can be seen, the control system is a cascaded control system, which comprises an outer loop and an inner loop. The feedback of the outer loop is the output voltage of the converter. The outer loop creates the reference signal (reference current) for the inner loop. The feedback for the inner loop is the input DC bus current. Thus, the outer loop regulates the output DC voltage, while the inner loop regulates the input DC current. Typically, linear control techniques and look-up-tables (LUT) are used for both the outer loop and the inner loop. These linear techniques are optimized for a fixed operating point (chosen to be quiescent operation). As a result, they show poor performance when the converter operates over wide input/output conditions and wide load conditions. They may demonstrate sluggish transient response, poor tracking, and low stability margins for some operating conditions.

The most common modulation scheme when operating at high power is the phase-shift-modulation scheme (PSM). In PSM, the duty cycles (D_(A) and D_(B)) and the switching frequency (f_(s)) of the converter are constant. Thus, the phase shift (φ) is solely responsible for controlling the power flow in DAB converters. The main advantages of using PSM for controlling DAB converters are the simplicity of control and the ability to provide zero-voltage switching (ZVS) for heavy loads. However, DAB converters show poor performance when PSM is used at low or medium-level power loads.

Other modulation techniques, including variable duty cycle modulation (VDM) and triangular current mode modulation (TCM) may be used at medium and low load levels, respectively. However, each of these techniques is similarly limited to a narrow range of inputs. Additionally, these modulation schemes are operated with half cycle symmetry. This may result in current spikes during transients. Such current spikes are often harmful to components of the converters, and can also cause temporary saturation of the transformer component of the converter, thereby reducing the overall power efficiency.

Thus, there is a need for a control system and method that performs well over a range of input conditions and a range of load conditions. Additionally, there is a need for a control method that prevents temporary saturation of the transformer.

SUMMARY

This document discloses a control system and method for controlling power flow in dual active bridge converters. The control system consists of cascaded control with an outer loop and an inner loop. The outer loop creates an inner loop reference signal. The inner loop includes a new compensator, a feedback unit and a modulator. A feedback unit samples the transformer primary current every half switching cycle. The output of this feedback unit is either the transformer primary current or the inverse sign of this (depending on the half switching cycle). The inner loop reference signal is subtracted from the output of the feedback unit to create an inner loop error. A geometric-sequence-control (GSC), which is a model-based predictive current control technique, is used as the compensator to create the control parameters from this error. The control parameters are used by the modulator to create the switching instants for the switches (i.e. when to switch). The modulation technique is one of phase-shift modulation (PSM), variable duty cycle modulation (VDM), or triangular current mode modulation (TCM). The compensator inside the control system allows the inner loop error to approach zero in a fast and seamless manner.

In a first aspect, this document discloses a control system for a dual active bridge (DAB) DC/DC converter, said control system comprising: a feedback unit; a compensator; and a modulator, wherein said feedback unit measures a transformer current from a bridge component of said DAB converter as input and wherein an inner loop reference current is subtracted from an output of said feedback unit; wherein an output of said subtraction is passed to said compensator; wherein said compensator determines control parameters for said modulator; and wherein said modulator applies a modulation technique based on said control parameters to change a switching pattern to thereby control said transformer current and to thereby control a power flow in said circuit.

In another embodiment, this document discloses a control system wherein said modulation technique is one of: phase-shift modulation (PSM), variable duty cycle modulation (VDM), and triangular current mode modulation (TCM).

In another embodiment, this document discloses a control system wherein said feedback unit samples said transformer current once every half switching cycle.

In another embodiment, this document discloses a control system wherein said compensator updates said control parameters once every half switching cycle.

In another embodiment, this document discloses a control system wherein said modulator updates said switching pattern every half switching cycle.

In another embodiment, this document discloses a control system wherein said transformer current is modified based on an output of said modulator.

In another embodiment, this document discloses a control system wherein said compensator determines said control parameters using a geometric-sequence-control (GSC) method.

In another embodiment, this document discloses a control system wherein said GSC method is based on an error in said inner loop reference current.

In another embodiment, this document discloses a control system wherein said GSC method is applied such that an error in said inner loop reference current decreases in a geometric sequence progression over successive half switching cycle samplings, and wherein said control parameters are by-products of said GSC method.

In another embodiment, this document discloses a control system wherein said control parameters comprise at least one of: a phase shift of the converter, a duty cycle of said bridge component, and a duty cycle of another bridge component of said DAB converter.

In another embodiment, this document discloses a control system wherein said system conforms to at least one of the following conditions:

-   -   when a power level within said circuit is below a first         threshold, said modulation technique is triangular current mode         modulation (TCM);     -   when said power level is between said first threshold and a         second threshold, said modulation technique is variable duty         cycle modulation (VDM), said second threshold being higher than         said first threshold; and     -   when said power level is above said second threshold, said         modulation technique is phase-shift modulation (PSM).

In a second aspect, this document discloses controlling a power flow within a circuit comprising a dual active bridge (DAB) DC/DC converter, said method comprising the steps of: receiving a current from a bridge component of said DAB converter as input for a compensator; measuring a current from a transformer component of said DAB converter; based on said current, determining control parameters for a modulator; and using said modulator, applying a modulation technique based on said control parameters, to thereby modify said current and to thereby control said power flow in said circuit.

In another embodiment, this document discloses a method wherein said modulation technique is one of: phase-shift modulation (PSM), variable duty cycle modulation (VDM), and triangular current mode modulation (TCM).

In another embodiment, this document discloses a method wherein said control parameters are determined by applying a geometric-sequence-control (GSC) method

In another embodiment, this document discloses a method wherein said GSC method is based on inner loop current error.

In another embodiment, this document discloses a method wherein said control parameters are determined by a compensator.

In another embodiment, this document discloses a method wherein said compensator updates said control parameters once every half switching cycle.

In another embodiment, this document discloses a method wherein said GSC method is applied such that an inner loop current error decreases in a geometric sequence progression over successive half switching cycle samplings, and wherein said control parameters are by-products of said GSC method.

In another embodiment, this document discloses a method wherein said control parameters comprise at least one of: a phase shift of the converter, a duty cycle of said bridge component, and a duty cycle of another bridge component of said DAB converter.

In another embodiment, this document discloses a method wherein said method conforms to at least one of the following conditions:

-   -   when a power level within said circuit is below a first         threshold, said modulation technique is triangular current mode         modulation (TCM);     -   when said power level is between said first threshold and a         second threshold, said modulation technique is variable duty         cycle modulation (VDM), said second threshold being higher than         said first threshold; and     -   when said power level is above said second threshold, said         modulation technique is phase-shift modulation (PSM).

In a further aspect, the present invention provides non-transitory computer-readable media having encoded thereon computer-readable and computer-executable instructions that, when executed, implement a method for controlling a power flow within a circuit comprising a dual active bridge (DAB) DC/DC converter, said method comprising the steps of: receiving a current from a bridge component of said DAB converter as input for a compensator; measuring a current from a transformer component of said DAB converter; based on said current, determining control parameters for a modulator; and using said modulator, applying a modulation technique based on said control parameters, to thereby modify said current and to thereby control said power flow in said circuit.

In another embodiment, this document discloses non-transitory computer-readable media wherein said modulation technique is one of: phase-shift modulation (PSM), variable duty cycle modulation (VDM), and triangular current mode modulation (TCM).

In another embodiment, this document discloses non-transitory computer-readable media wherein said control parameters are determined by applying a geometric-sequence-control (GSC) method.

In another embodiment, this document discloses non-transitory computer-readable media wherein said GSC method is based on inner loop current error.

In another embodiment, this document discloses non-transitory computer-readable media wherein said control parameters are determined by a compensator.

In another embodiment, this document discloses non-transitory computer-readable media wherein said compensator updates said control parameters once every half switching cycle.

In another embodiment, this document discloses non-transitory computer-readable media wherein said GSC method is applied such that an inner loop current error decreases in a geometric sequence progression over successive half switching cycle samplings, and wherein said control parameters are by-products of said GSC method.

In another embodiment, this document discloses non-transitory computer-readable media wherein said control parameters comprise at least one of: a phase shift of the converter, a duty cycle of said bridge component, and a duty cycle of another bridge component of said DAB converter.

In another embodiment, this document discloses non-transitory computer-readable media wherein the method implemented by the execution of the instructions encoded thereon conforms to at least one of the following conditions: when said power level is below a first threshold, said modulation technique is triangular current mode modulation (TCM); when said power level is between said first threshold and a second threshold, said modulation technique is variable duty cycle modulation (VDM), said second threshold being higher than said first threshold; and when said power level is above said second threshold, said modulation technique is phase-shift modulation (PSM).

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will now be described by reference to the following figures, in which identical reference numerals refer to identical elements and in which:

FIG. 1 is a block diagram of a conventional DAB DC/DC converter and a conventional proportional-integral (PI) control system, according to the prior art;

FIG. 2 is a block diagram of a DAB DC/DC converter according to an aspect of the present invention;

FIG. 3A is an expanded block diagram of a conventional DAB converter, according to the prior art;

FIG. 3B is a schematic diagram of the equivalent circuit of a DAB converter, according to the prior art;

FIG. 4 is a plot showing three steady state waveforms (specifically, v_(p), kv_(s), and i_(p)), in conventional DAB converters, according to the prior art;

FIG. 5A is a 3-dimensional illustration of the zero-voltage switching (ZVS) region of the conventional DAB converter, according to the prior art;

FIG. 5B is a cross-section of FIG. 5A at φ=0.5;

FIG. 5C is a cross-section of FIG. 5A at φ=0.2;

FIGS. 6A and 6B are plots showing waveforms produced by triangular current mode modulation, according to the prior art;

FIG. 7 is a block diagram illustrating an inner loop of the control system according to an aspect of the present invention, when TCM is used;

FIG. 8 is a block diagram illustrating an inner loop of the control system according to an aspect of the present invention, when VDM is used;

FIG. 9 is a block diagram illustrating an inner loop of the control system according to an aspect of the present invention, when PSM is used;

FIG. 10 is a plot showing an exemplary transient response of the DAB converter according to the prior art;

FIGS. 11A and 11B are plots showing i_(p) with different phase-shifts for each half cycle;

FIG. 12 is a plot showing a dynamic response of the DAB converter according to the present invention;

FIG. 13 is a plot showing steady-state current waveforms associated with current and phase shift;

FIGS. 14A to 14F are plots showing asymmetric waveforms;

FIGS. 15A and 15B are plots showing i_(p) with different duty cycles of Bridge A at each half cycle;

FIGS. 16A and 16B are plots showing i_(p) with different duty cycles of Bridge B at each half cycle;

FIGS. 17A and 17B are plots showing i_(p) with different φ[n] s for each half cycle when v_(a)>kv_(b);

FIGS. 18A and 18B are plots showing i_(p) with different φ[n] s for each half cycle when v_(a)<kv_(b);

FIGS. 19A to 19D depict the transient response of the control system of FIG. 2 ;

FIGS. 20A to 20C depict the performance of the control system of FIG. 2 when the series inductor is varied by 100%;

FIG. 21 is a plot comparing the transient response of the control system of FIG. 2 with the response of conventional PI controllers;

FIG. 22 illustrates the transient operation of a DAB converter with a conventional control system, according to the prior art;

FIG. 23 depicts the steady-state operation of a DAB converter with a power flow from port B to port A, according to the prior art; and

FIG. 24 is a flowchart detailing a method according to one aspect of the invention.

DETAILED DESCRIPTION

For clarity, Table 1 outlines the meaning of terms and symbols used throughout this document:

TABLE 1 Acronym/Symbol Meaning k transformer turns ratio L_(s) DAB high frequency network inductance ƒ_(s) switching frequency T_(s) switching period V_(α) DC voltage of port A V_(b) DC voltage of port B ν_(α, [n]) voltage of port A for half cycle [n] ν_(b [n]) DC voltage of port A for half cycle [n] ν_(p) transformer primary voltage ν_(s) transformer secondary voltage i_(p) transformer primary current i[n] sample current of the transformer primary current at the beginning of half cycle [n] Δi[n] current error of half cycle [n] di[n] current difference between i[n + 2] and i[n] (i [n + 2] − i[n]) t₀[n] timing instant when v_(p) is changed to + V_(α) − V_(α) in half cycle [n] t₁[n] time interval between t₀[n] and when ν_(s) is changed to zero in half cycle [n] t₂[n] time interval between the end of interval t₁[n] and when ν_(s), is changed t₃[n] time interval between the end of interval t₂[n] and when ν_(p) is changed P output power P_(max) maximum possible power level P_(BC) power level that corresponds to φ = φ_(BC) in PSM P_(ZVS,min) lower power level in which ZVS is achieved with VDM P_(Δ,max) maximum achievable power with TCM D_(α) duty cycle of bridge A D_(α)[n] duty cycle of bridge A for half cycle [n] D_(b) duty cycle of bridge B D_(bmin) duty cycle of bridge B when lowest possible operating power that ZVS can be achieved with VDM when V_(α) < kV_(b) D_(α),_(min) duty cycle of bridge A when lowest possible operating power that ZVS can be achieved with VDM when V_(α) > kVb D_(b)[n] duty cycle of bridge B for half cycle [n] φ phase-shift φ [n] phase-shift for half cycle [n] φ_(BC) minimum phase-shift in which ZVS is achieved with PSM $m_{1} = \frac{V_{a} + {kV}_{b}}{L_{s}}$ slope of current $m_{2} = \frac{{V_{a}1} - {kV}_{b}}{L_{s}}$ slope of current $m_{3} = \frac{- {kV}_{b}}{L_{s}}$ slope of current $m_{4} = \frac{V_{a}}{L}$ slope of current x[n] in general, x[n] is the value of x for half cycle [n] PSM phase-shift modulation VDM variable duty cycle modulation TCM triangular current mode modulation ZVS zero-voltage switching

Additionally, to better understand the present invention, the reader is directed to the listing of citations at the end of this description. For ease of reference, these citations and references have been referred to by their listing number throughout this document. The contents of the citations in the list at the end of this description are hereby incorporated by reference herein in their entirety.

The present invention provides a control system and method that allows DAB converters to operate more effectively at a wide range of input and load conditions. In particular, the present invention allows the DAB converter to apply different modulation techniques based on the control parameters identified. That is, the present invention applies PSM, VDM, or TCM based on parameters of the received signal and feeds back the modulated signal to more effectively compensate for error and control power flows. The compensator of the inner loop of the control system applies a geometric sequence control (GSC) method to determine the control parameters of the modulator. The operating power of the DAB converter determines which modulation technique to apply. Additionally, the control parameters used by the GSC are updated by sampling the input signal every half switching cycle (asymmetric half cycle modulation). This asymmetric half cycle modulation ensures zero DC current in the transformer winding and helps to prevent transformer saturation.

FIG. 2 is a block diagram showing an embodiment of control system 10 for a DAB converter according to the present invention. It should be understood that this diagram represents a prototype circuit that was used in experimentation, as discussed in greater detail below. Accordingly, certain design choices were made that should not be seen as limiting the invention. As one example, the configuration of the gates in the bottom left of this diagram should not be taken to limit the invention. Any gate configuration that produces a suitably modified signal can be used.

The compensator 30 receives an output current signal (i_(b)(t)) from one of the bridge components of the DAB converter (in this case, from bridge B). The output of this compensator 30 is passed to the control unit 40. A primary current is measured at a transformer component of said DAB converter (i_(p)(t)) and modified via a series of gates, to thereby produce a modified primary current. A reference signal for the GSC loop (i.e., for the inner loop) is created by an outer loop control. This outer loop control includes i_(b)[n] as feedback, I_(b,ref) as the reference load, and a compensator to create the reference signal. The current error created by subtracting the reference signal from the modified transformer (i[n−1] or −i_([)n−1]) is fed to the GSC scheme to create the control parameters φ, D_(a), and D_(b). These parameters are passed to the modulator 50 and are used to determine a modulation technique to be applied (either TCM, VDM, or PSM). The signal identified as “mode”, which is generated inside the modulator 50 and fed back to the control unit 40, identifies which modulation technique should be applied, based on the calculated power level determined from the control parameters. The outputs of the modulator are the switching signals for the switches (S_(AN) and S_(BN)) and a sampling signal (ss), which is fed back to the inner loop and used as a basis to determine half cycle switching instants (i.e., when to switch) for measuring the transformer primary current.

It should be clear that there are two compensators in the control system: an outer loop compensator/feedback unit 30 and an inner loop compensator 40. In one aspect of the present invention, the inner loop compensator uses a geometric-sequence-control (GSC) method while the feedback unit samples the transformer current once every half cycle and modifies it. Then, the inner loop reference signal (which is provided as output from the outer loop) is subtracted from this modified signal to create the inner loop error. The inner loop compensator 40 uses this inner loop error to determine and change the control parameters. The control parameters are used by the modulator 50 to create and change the switching pattern of the switches and to thereby modify the transformer current. This thereby changes the power level.

Conventional DAB Converters

FIG. 3A depicts the schematic diagram of a typical DAB DC/DC converter. DAB DC/DC converters are used as an interface to allow bidirectional power flow between two DC buses (V_(a) and V_(b)). Due to the four controlling parameters of DAB converters, the shape of the transformer current is very flexible, in that, by utilizing a combinations of these controlling parameters, ZVS and low RMS current can be achieved. RMS current is typically lower when the current is close to a square wave shape.

DAB converters consist of two active bridges (Bridge A and Bridge B), a high frequency network (a transformer with series inductance), and two filter networks (C_(A) and C_(B)). The two active bridges (A and B) create quasi-square wave voltages (v_(p) and v_(s)) at the two ends of the high frequency network. FIG. 3B depicts the equivalent circuit of a DAB converter (in a lossless conversion), where n is the transformer turns ratio, L_(s) is the series inductance, and i_(p) is the current in the transformer primary winding. Based on the switching pattern, v_(p) can hold three states: +V_(a), −V_(a), and 0; similarly v_(s) has three states: +V_(b), −V_(b), and 0. The current, i_(p), is calculated as:

$\begin{matrix} {{i_{p}(t)} = {{\frac{1}{L_{s}}{\int_{t_{0}}^{t}{\left( {v_{p} - {kv}_{s}} \right){dt}}}} + {i_{p}\left( t_{0} \right)}}} & (1) \end{matrix}$

In steady-state operation,

$\begin{matrix} {{{v_{p}(t)} = {v_{p}\left( {t + \frac{T_{s}}{2}} \right)}},{and}} & (2) \\ {{v_{s}(t)} = {{v_{s}\left( {t + \frac{T_{s}}{2}} \right)}.}} & (3) \end{matrix}$

When there is no DC current present in the transformer winding (i_(p)=0), i_(p)(t) is also equal to

$\begin{matrix} {{i_{p}(t)} = {{i_{p}\left( {t + \frac{T_{s}}{2}} \right)}.}} & (4) \end{matrix}$

FIG. 4 depicts three steady state waveforms (specifically, v_(p), kv_(s), and i_(p)), in conventional DAB converters, when ZVS is achieved for all the switches (that is, where the DC current of i_(p) is zero). In FIG. 4 , t₀ is defined as the instant when S_(A1) is turning on and S_(A2) has turned off, while S_(A3) is off and S_(A4) is on. t₁ is defined as the instant when S_(B1) is turning on and S_(B2) has turned off while S_(B3) and S_(B4) are on and off. The ZVS criteria represented in this figure obey the following relations: i _(p)(t ₀)<0  (5) i _(p)(t ₁)>0  (6) 1−(D _(a) +D _(b))<φ<D _(a) +D _(b)  (7)

The steady-state value of i_(p)(t₀), i_(p)(t₁), and the output power flow P in a lossless conversion can be derived as follows:

$\begin{matrix} {\mspace{76mu}{{{i_{p}\left( t_{0} \right)}\lbrack n\rbrack} = {\frac{1}{2L_{s}f_{s}}\left( {{\left( {- {D_{a}\lbrack n\rbrack}} \right)V_{a}} + {\left( {1 - {D_{a}\lbrack n\rbrack} - {\varphi\lbrack n\rbrack}} \right){kV}_{b}}} \right)}}} & (8) \\ {\mspace{76mu}{{i_{p}\left( t_{1} \right)} = {\frac{1}{2L_{s}f_{s}}\left( {{\left( {{D_{b}{p\lbrack n\rbrack}} + \varphi - 1} \right)V_{a}} + {\left( {D_{b}\lbrack n\rbrack} \right){kV}_{b}}} \right)}}} & (9) \\ {{P = {\frac{{kV}_{a}V_{b}}{2\mspace{14mu} L_{s}f_{s}}\left( {\frac{1}{4} - \left( {\left( {{D_{a}\lbrack n\rbrack} - \frac{1}{2}} \right)^{2} + \left( {{D_{b}\lbrack n\rbrack} - \frac{1}{2}} \right)^{2} + \left( {{\varphi\lbrack n\rbrack} - \frac{1}{2}} \right)^{2}} \right)} \right)}}\mspace{76mu}{where}} & (10) \\ {\mspace{76mu}{{{\varphi\lbrack n\rbrack} = {\frac{1}{2} + {{t_{1}\lbrack n\rbrack}f_{s}} + {{t_{2}\lbrack n\rbrack}f_{s}} - {{t_{3}\lbrack n\rbrack}f_{s}}}},{0 < {\varphi\lbrack n\rbrack} < 0.5}}} & (11) \\ {\mspace{76mu}{{D_{a}\lbrack n\rbrack} = {{{t_{3}\lbrack n\rbrack}f_{s}0} < {D_{a}\lbrack n\rbrack} < 0.5}}} & (12) \\ {\mspace{76mu}{{D_{b}\lbrack n\rbrack} = {{\frac{1}{2} + {{t_{1}\lbrack n\rbrack}f_{s}} - {{t_{2}\lbrack n\rbrack}f_{s}0}} < {D_{b}\lbrack n\rbrack} < 0.5}}} & (13) \end{matrix}$ where φ[n] is the phase shifts for the n^(th) half cycle, and D_(a)[n] and D_(b)[n] are the duty cycles for the n^(th) cycle of bridge A and bridge B, respectively. Thus, ½φT_(s) is the time difference between the center points of the two quasi-square waveform: v_(p) and v_(s).

Using (8) and (9), the ZVS criteria can be rewritten as:

$\begin{matrix} \left. {{i_{p}\left( t_{0} \right)} < 0}\rightarrow{\frac{V_{a}}{{kV}_{b}} > \frac{1 - \varphi - D_{a}}{D_{a}}} \right. & (14) \\ \left. {{i_{p}\left( t_{1} \right)} > 0}\rightarrow{\frac{{kV}_{b}}{V_{a}} > \frac{1 - \varphi - D_{b}}{D_{b}}} \right. & (15) \\ {{1 - \left( {D_{a} + D_{b}} \right)} < \varphi < {D_{a} + D_{b}}} & (16) \end{matrix}$

FIG. 5A is a 3-dimensional illustration of the ZVS region of the conventional DAB converter, when V_(a)=90 V_(DC), V_(b)=110 V_(DC), f_(s)=250 kHz, n=0.9, and L_(s)=10 μH. This figure depicts all the possible combinations of the control parameters D_(a), D_(b), φ that comply with the constraints given in (14), (15), and (16). The color bar on the right shows the power levels of the converter for each contour. FIG. 5B is a 2-dimensional representation that shows the cross section of FIG. 5A for φ=0.5. Similarly, FIG. 5C shows the cross section of FIG. 5A for φ=0.2. The bar on the right of each figure shows the power level for each contour.

Hybrid Modulation Scheme

Phase-Shift Modulation (PSM)

In PSM, the duty cycles D_(a) and D_(b) are equal to 0.5. That is, the phase-shift, φ, is solely responsible for controlling power flow. The ZVS criteria for PSM can be derived as:

$\begin{matrix} {0 < \varphi < 0.5} & (17) \\ {{\min\left\{ {\frac{V_{a}}{{kV}_{b}},\frac{{kV}_{b}}{V_{a}}} \right\}} > {1 - {2\varphi}}} & (18) \end{matrix}$

The extreme cases, where φ=0.5 and φ=0 correspond to the maximum and minimum power flow with the PSM modulation, respectively, can be written as follows:

$\begin{matrix} {{{\min\left\{ {\frac{V_{a}}{{kV}_{b}},\frac{{kV}_{b}}{V_{a}}} \right\}} > {0\varphi}} = 0.5} & (19) \\ {{{\min\left\{ {\frac{V_{a}}{{kV}_{b}},\frac{{kV}_{b}}{V_{a}}} \right\}} > {1\varphi}} = 0} & (20) \end{matrix}$

The minimum phase-shift for which ZVS is achieved with PSM is called the “boundary condition phase-shift” (φ_(BC)). ZVS is lost for phase-shifts lower than φ_(BC). Equation (18) can be rewritten to find φ_(BC) as follows:

$\begin{matrix} {\varphi_{BC} = {\frac{1}{2}\left( {1 - {\min\left\{ {\frac{V_{a}}{{kV}_{b}},\frac{{kV}_{b}}{V_{a}}} \right\}}} \right)}} & (21) \end{matrix}$

Thus, in the hybrid modulation scheme of the present invention, PSM can be effectively used for phase-shifts within the [φ_(BC) to 0.5] interval. That is, PSM is used for operating conditions where the power flow ranges between [P_(BC) to P_(max)], where P_(BC) corresponds to the power flow when φ=φ_(BC) and P_(max) corresponds to the power flow when φ=0.5. For power levels lower than P_(BC), which correspond to phase-shifts lower than φ_(BC), VDM is applied.

Variable Duty Cycle Modulation (VDM)

A form of VDM is used that can achieve ZVS at power levels lower than P_(BC) by only using one control parameter. From (10), it can be inferred that, in order to decrease the power flow, either φ, D_(a), or D_(b) has to be decreased. In the VDM of the present invention, φ is kept constant at φ=φ_(BC) and one of the duty cycles (D_(a) or D_(b)) decreases while the other remains at 0.5. Decreasing both duty cycles at the same time while φ=φ_(BC) would cause the loss of ZVS. The relation between kV_(b) and V_(a) determines which of the duty cycles (D_(a) or D_(b)) can be changed to maintain ZVS, as follows:

-   -   Case 1. V_(a)<kV_(b): In this case, D_(a)=0.5 and D_(b) is used         to control the power flow.     -   Case 2. kV_(b)<V_(a): In this case, D_(b)=0.5 and D_(a) is used         to control the power flow.     -   Case 3. kV_(b)=V_(a): In this case, PSM covers the whole range         of power levels since φ_(BC)=0 and P_(BC)=0. Therefore, there is         no need for VDM in this scenario.

Case 1. V_(a)<kV_(b)

According to (21), φ_(BC) can be calculated as:

$\begin{matrix} {\varphi_{BC} = {\frac{1}{2}\left( {1 - \frac{V_{a}}{{kV}_{b}}} \right)}} & (22) \end{matrix}$

Phase-shifts lower than φ_(BC) violate the ZVS criteria introduced in (14). That is, if φ<φ_(BC), i_(p)(t₀) will become positive. Similarly, reducing D_(a) while φ=φ_(BC) violates the ZVS criteria in (14). Thus, in this case, D_(b) is the only control parameter while φ and D_(a) remain at φ_(BC) and 0.5, respectively. As D_(b) decreases, the ZVS criteria in (15) and (16) becomes more stringent. The lowest power level (P_(ZVS,min)) under ZVS is when φ=φ_(BC) and D_(b)=D_(bmin), where D _(bmin)=0.5−φ_(BC)  (23) and P_(ZVS,min) can be calculated from:

$\begin{matrix} {P_{{ZVS},\min} = {\frac{{kV}_{a}V_{b}}{2\mspace{14mu} L_{s}f_{s}}\left( {\varphi_{BC} - {2\varphi_{BC}^{2}}} \right)}} & (24) \end{matrix}$

Case 2. kV_(b)<V_(a)

According to (21), φ_(BC) can be calculated as:

$\begin{matrix} {\varphi_{BC} = {\frac{1}{2}\left( {1 - \frac{{kV}_{b}}{V_{a}}} \right)}} & (25) \end{matrix}$ In this case, D_(a) is required to control the power flow. Similar to the previous case, D_(amin) can be calculated as D _(amin)=0.5−φ_(BC)  (26) and P_(ZVS,min) can be calculated as in (24).

Thus, with the hybrid modulation, ZVS can be achieved over (P_(ZVS,min)<P<P_(max)), where VDM is used for P_(ZVS,min)<P<P_(BC) and PSM is used for P_(BC)<P<P_(max).

Case 3. kV_(b)=V_(a)

Again, as PSM covers the whole range of power levels in this case, there is no need for VDM in this scenario.

Triangular Current Mode Modulation (TCM)

At low power operations, TCM modulation shows the lowest RMS current in the transformer primary winding. Thus, this modulation scheme is implemented for power levels below P_(ZVS,min)(P<_(ZVS,min)). The key waveforms of the TCM modulation are depicted in FIGS. 6A and 6B. At steady-state operation, the control variables for all half cycles are equal

${\left( {{{\varphi\lbrack n\rbrack} = {\varphi\left\lbrack {n + 1} \right\rbrack}},{{D_{a}\lbrack n\rbrack} = {D_{a}\left\lbrack {n + 2} \right\rbrack}},{{{and}\mspace{14mu}{D_{b}\lbrack n\rbrack}} = {D_{b}\left\lbrack {n + 1} \right\rbrack}}} \right)\mspace{14mu}{and}\mspace{14mu}{i_{p}(t)}} = {{i_{p}\left( {t + \frac{T_{s}}{2}} \right)}.}$ The steady-state equations of power flow and the control variables in the TCM scheme are given in Ref. [1], noted below. These equations can be expressed as:

$\begin{matrix} {\begin{matrix} {P = \frac{\varphi^{2}{V_{a}\left( {kV_{b}} \right)}^{2}}{L_{s}{f_{s}\left( {V_{a} - {k\; V_{b}}} \right)}}} \\ {D_{a} = {\frac{- m_{3}}{m_{2}}\varphi}} \\ {D_{b} = {D_{a} + \varphi}} \end{matrix}{for}\mspace{14mu}\left\{ \begin{matrix} {P < P_{\Delta,\max}} \\ {V_{a} > {kv}_{b}} \end{matrix} \right.} & (27) \\ {\begin{matrix} {P = \frac{\varphi^{2}k\;{V_{b}\left( V_{a} \right)}^{2}}{L_{s}{f_{s}\left( {{k\; V_{b}} - V_{a}} \right)}}} \\ {D_{a} = {\frac{- m_{4}}{m_{2}}\varphi}} \\ {D_{b} = {D_{a} + \varphi}} \end{matrix}{for}\mspace{14mu}\left\{ {\begin{matrix} {P < P_{\Delta,\max}} \\ {V_{a} < {kv}_{b}} \end{matrix}\mspace{14mu}{where}} \right.} & (28) \\ {m_{2} = \frac{V_{a} - {kV_{b}}}{L_{s}}} & (29) \\ {m_{3} = \frac{{- k}V_{b}}{L_{s}}} & (30) \\ {m_{4} = \frac{V_{a}}{L_{s}}} & (31) \end{matrix}$

P_(Δ,max) is equal to P_(ZVS,min) introduced in (24) (P_(Δ),max=P_(ZVS,min)); hence, the minimum operating power of the VDM scheme coincides with the maximum power level of the TCM scheme. According to (27) and (28), φ is used to control the power flow and the duty cycles (D_(a) and D_(b)) are calculated as functions of φ. Thus, in one aspect of the present invention, the control is designed such that φ[n] is determined by the GSC control law and the duty cycles for half cycle [n] are derived from:

$\begin{matrix} {{D_{a}\lbrack n\rbrack} = {{\frac{k{v_{b}\lbrack n\rbrack}}{{v_{a}\lbrack n\rbrack} - {k{v_{b}\lbrack n\rbrack}}}}{\varphi\lbrack n\rbrack}}} & (32) \\ {{D_{b}\lbrack n\rbrack} = {{\frac{v_{a}\lbrack n\rbrack}{{v_{a}\lbrack n\rbrack} - {k{v_{b}\lbrack n\rbrack}}}}{\varphi\lbrack n\rbrack}}} & (33) \end{matrix}$ where v_(a)[n] and v_(b)[n] are the voltages of ports A and B for the n^(th) half cycle, respectively. Geometric Sequence Control (GSC) Method

The GSC method applied by the control unit 40 and the modulator 50 is capable of accurately and seamlessly tracking the reference signal such that the inner current loop error (Δi_(p)[n]) decreases in a geometric sequence progression (hence the name geometric-sequence-control (GSC)). GSC is a recursive nonlinear difference equation, which creates the control parameters. The control variables are updated every half switching cycle at the sampling instant. The sampling instants vary depending on the converter operating condition. Table 2 gives a list of these instants for all the conditions with respect to the modulation type and the relationship between v_(a)[n] and kv_(b)[n].

TABLE 2 modulation condition sample instant *PSM v_(a)[n] > kv_(b)[n] v_(p) changes v_(a)[n] < kv_(b)[n] polarity *VDM v_(a)[n] > kv_(b)[n] v_(p) changes from zero to ±v_(a)[n] v_(a)[n] < kv_(b)[n] v_(s) changes from zero to ±v_(b)[n] *TCM v_(a)[n] > kv_(b)[n] v_(p) changes from ±v_(a)[n] to zero va[n] < kv_(b)[n] v_(s) changes from ±v_(b)[n] to zero

FIG. 7 depicts the inner loop of the control system of one aspect of the present invention when TCM is used (for power levels of (P<P_(ZVS,min)). When kV_(b)<V_(a), the GSC control law for the TCM mode is derived as follows:

$\begin{matrix} {{\varphi\lbrack n\rbrack} = {{\frac{0.5L_{s}f_{s}}{2k{v_{b}\lbrack n\rbrack}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {\varphi\left\lbrack {n - 1} \right\rbrack}}} & (34) \\ {{D_{a}\lbrack n\rbrack} = {\frac{k{v_{b}\lbrack n\rbrack}}{{v_{a}\lbrack n\rbrack} - {k{v_{b}\lbrack n\rbrack}}}{\varphi\lbrack n\rbrack}}} & (35) \\ {{D_{b}\lbrack n\rbrack} = {\frac{v_{a}\lbrack n\rbrack}{{v_{a}\lbrack n\rbrack} - {k{v_{b}\lbrack n\rbrack}}}{\varphi\lbrack n\rbrack}}} & (36) \end{matrix}$ where φ[n−1] is the phase shift of the n−1^(th) half cycle. When kV_(b)>V_(a), the GSC control law for the TCM mode is achieved as:

$\begin{matrix} {{\varphi\lbrack n\rbrack} = {{\frac{{0.5}L_{s}f_{s}}{2{v_{a}\lbrack n\rbrack}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {\varphi\left\lbrack {n - 1} \right\rbrack}}} & (37) \\ {{D_{a}\lbrack n\rbrack} = {\frac{k{v_{b}\lbrack n\rbrack}}{{k{v_{b}\lbrack n\rbrack}} - {v_{a}\lbrack n\rbrack}}{\varphi\lbrack n\rbrack}}} & (38) \\ {{D_{b}\lbrack n\rbrack} = {\frac{v_{a}\lbrack n\rbrack}{{k{v_{b}\lbrack n\rbrack}} - {v_{a}\lbrack n\rbrack}}{\varphi\lbrack n\rbrack}}} & (39) \end{matrix}$

FIG. 8 depicts the inner loop of the control system of the present invention when VDM is used (for power levels of (P_(ZVS,min)<P<P_(BC)). When kV_(b)<V_(a), the GSC control law for the VDM mode is as follows:

$\begin{matrix} {{D_{a}\lbrack n\rbrack} = {{\frac{0.5L_{s}f_{S}}{{v_{a}\lbrack n\rbrack} + {k{v_{b}\lbrack n\rbrack}}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {D_{a}\left\lbrack {n - 1} \right\rbrack}}} & (40) \\ {{D_{b}\lbrack n\rbrack} = 0.5} & (41) \end{matrix}$ where D_(a)[n] and D_(a)[n−1] are the duty cycles for n^(th) and (n−1)^(th) half switching cycles of bridge A, respectively. v_(a)[n] is the voltage of port A for the n^(th) half cycle. When kV_(b)>V_(a), the GSC control law for the VDM mode is as follows:

$\begin{matrix} {{D_{b}\lbrack n\rbrack} = {{\frac{0.5L_{s}f_{s}}{{v_{a}\lbrack n\rbrack} + {k{v_{b}\lbrack n\rbrack}}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {D_{b}\left\lbrack {n - 1} \right\rbrack}}} & (42) \\ {{D_{a}\lbrack n\rbrack} = 0.5} & (43) \end{matrix}$ where D_(b)[k] and D_(b)[k−1] are the duty cycles for k^(th) and (k−1)^(th) half switching cycles of bridge B, respectively. The hybrid modulator uses these duty cycles and φ=φ_(BC) to create the switching instants.

FIG. 9 depicts the inner loop of the control system of one aspect of the present invention when PSM is used. For this aspect of the present invention, the GSC control law for PSM is defined as follows:

$\begin{matrix} {{\varphi\lbrack n\rbrack} = {{{0.5}\frac{L_{s}f_{s}}{k{v_{b}\lbrack n\rbrack}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {\varphi\left\lbrack {n - 1} \right\rbrack}}} & (44) \end{matrix}$ where φ[n] and φ[n−1] are the phase-shifts for n^(th) and (n−1)^(th) half switching cycles, respectively. Δi_(p,t) ₀ [k−1] is the discrete current error (i.e. Δi_(p)=i_(ref)−i_(p)) for the (n−1)^(th) half cycle at t=t₀, and v_(b)[n] is the voltage of port B in the n^(th) half cycle. Derivation of GSC for PSM

FIG. 10 depicts an exemplary transient response of the DAB converter when the phase-shift changes in response to a step change in the reference current (waveforms i_(p), v_(p), and v_(s)), using a conventional control method. As can be seen, the change in the phase-shift (φ[n]) in response to transients creates imbalance in the transformer current waveform. This imbalance may result in a DC component that saturates the transformer during transients.

Specifically, in FIG. 10 , the converter starts the transient from half cycle [0]. That is, the converter is at steady-state for the half cycles [−2] and [−1]. In the steady-state cycle, φ[−2]=φ[−1] and the magnitudes of the sampled currents (illustrated by solid dots) are equal (i.e., i[−2]=i[−1]=i[0]). The step change in the reference signal applied at the switching cycle 1 causes the phase-shift to increase. The increase in the phase-shift φ (i.e., φ[0]=φ[1] & φ[2]=φ[3] & . . . ) results in the increase in the sampled currents at the beginning of odd cycles (i[1]<i[3]), while the sampled currents at the beginning of even half cycles do not change (i[0]=i[2]=i[4]). The trajectories of these sampled currents are illustrated in FIG. 10 . Such asymmetrical growth of i_(p) causes the imbalance between its positive half cycle and its negative half cycle, leading to a temporary saturation of the transformer. The main issue stems from the fact that the phase-shift is constant in every switching cycle (two consecutive half cycles) during transient (e.g., φ[0]=φ[1] & φ[2]=φ[3]). In order to eliminate this issue, the GSC method for this aspect of the present invention changes φ every half cycle (i.e., φ[0]≠[1] & φ[2]≠φ[3]).

FIGS. 11A and 11B depict the deviation of i_(p) when there is a change in the phase-shift within a switching cycle (i.e., different phase-shifts for each half cycle). FIG. 11A depicts the first half cycle [n] when v_(p)>0. To better describe the changes in i_(p) changes when there are changes in the phase-shift at each half cycle, φ*[n] is introduced. φ*[n] can be defined as the only value of phase-shift for half cycle [n] that corresponds to a current waveform, where the magnitude of the sampled current at the end of the half cycle [n] is equal to its beginning sampled current (i[n]). This current waveform corresponding to φ*[n] is depicted by a dashed line, which shows a steady-state current waveform when the reference value is equal to the magnitude of the sampled current at the beginning of the half cycle [n]. The solid line in half cycle [n] is the actual current of i_(p), which corresponds to a phase-shift of φ[n]. The difference between actual phase-shift and the steady-state phase-shift for half cycle [n] is: Δφ[n]=φ[n]−φ*[n]  (45)

By using the geometry in FIG. 11 , the following can be derived for v_(p)>0:

$\begin{matrix} {\frac{{i\left\lbrack {n + 1} \right\rbrack} + {i\lbrack n\rbrack}}{T_{s}\text{/}2} = {\left( {m_{1} - m_{2}} \right){{\Delta\varphi}\lbrack n\rbrack}}} & (46) \end{matrix}$ where m₁ and m₂ are the slopes and can be calculated as:

$\begin{matrix} {m_{1} = \frac{V_{a} + {kV_{b}}}{L_{s}}} & (47) \end{matrix}$

FIG. 11B depicts the deviation of i_(p) for the half cycle [n] when v_(p)<0. Similar to the first half cycle, φ*[n] for the second half cycle is defined such that the current value at the end of the second half cycle is equal to −i[n]. In this case, the following relationship is derived according to FIG. 11B (for v_(p)<0):

$\begin{matrix} {\frac{{- {i\left\lbrack {n + 1} \right\rbrack}} - {i\lbrack n\rbrack}}{T_{s}\text{/}2} = {\left( {m_{1} - m_{2}} \right){{\Delta\varphi}\lbrack n\rbrack}\mspace{14mu}{where}}} & (48) \\ {{\Delta\;{\varphi\left\lbrack {n + 1} \right\rbrack}} = {{\varphi\left\lbrack {n + 1} \right\rbrack} - {\varphi^{*}\left\lbrack {n + 1} \right\rbrack}}} & (49) \end{matrix}$

By using (48) (for the half cycle [n+1]) and (46), the following relationship is derived:

$\begin{matrix} {\frac{{- {i\left\lbrack {n + 2} \right\rbrack}} + {i\lbrack n\rbrack}}{T_{s}\text{/}2} = {\left( {m_{1} - m_{2}} \right)\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)}} & (50) \end{matrix}$

Eq'n. 50 is valid when i[n+2]<i[n+1] or i[n]<i[n+1]. The same relationship for i[n+2]>i[n+1] or i[n]>i[n+1] can be derived by using (48) for the half cycle [n−1] (n=n−1) and (46), as follows:

$\begin{matrix} {\frac{{i\left\lbrack {n + 2} \right\rbrack} - {i\lbrack n\rbrack}}{T_{s}\text{/}2} = {\left( {m_{1} - m_{2}} \right)\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)}} & (51) \end{matrix}$

The rate of change between the current samples is defined based on the difference between the current samples at the beginning of the first half cycle and the end of the consecutive half cycle (i.e. i[n+2] and i[n]) as:

$\begin{matrix} {\frac{d{i\lbrack n\rbrack}}{dt} = \frac{{i\left\lbrack {n + 2} \right\rbrack} - {i\lbrack n\rbrack}}{T_{s}}} & (52) \end{matrix}$

By using (47), (29), and (52) in (50) and (51), the rate of change for the current samples is derived as:

$\begin{matrix} {\frac{d{i\lbrack n\rbrack}}{dt} = \left\{ \begin{matrix} {\frac{{- k}V_{b}}{L_{s}}\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)} & {{\begin{matrix} \  \\ \  \end{matrix}{i\lbrack n\rbrack}} < {i\left\lbrack {n + 1} \right\rbrack}} \\ {\frac{kV_{b}}{L_{s}}\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)} & {{i\lbrack n\rbrack} > {i\left\lbrack {n + 1} \right\rbrack}} \end{matrix} \right.} & (53) \end{matrix}$

Eq'n. (53) shows the impact of φ on the value of current samples for the consecutive half cycles [n] and [n+1].

The current error (Δi[n]) is defined as:

$\begin{matrix} {{\Delta{i\lbrack n\rbrack}} = \left\{ \begin{matrix} {i_{ref} + {i\lbrack n\rbrack}} & {\ {{i\lbrack n\rbrack} < {i\left\lbrack {n + 1} \right\rbrack}}} \\ {i_{ref} - {i\lbrack n\rbrack}} & {{i\lbrack n\rbrack} > {i\left\lbrack {n + 1} \right\rbrack}} \end{matrix} \right.} & (54) \end{matrix}$ where i_(ref) is the current reference. Thus, the rate of change of the current error is given by:

$\begin{matrix} {\frac{d\Delta{i\lbrack n\rbrack}}{dt} = {\frac{{\Delta{i\left\lbrack {n + 2} \right\rbrack}} - {\Delta{i\lbrack n\rbrack}}}{T_{s}} = \left\{ \begin{matrix} \frac{{+ d}{i\lbrack n\rbrack}}{dt} & {\ {{i\lbrack n\rbrack} < {i\left\lbrack {n + 1} \right\rbrack}}} \\ \frac{{- d}{i\lbrack n\rbrack}}{dt} & {\ {{i\lbrack n\rbrack} > {i\left\lbrack {n + 1} \right\rbrack}}} \end{matrix} \right.}} & (55) \end{matrix}$

Eq'n. 55 can be rewritten as:

$\begin{matrix} {\frac{d{i\lbrack n\rbrack}}{dt} = \left\{ \begin{matrix} \frac{d\Delta{i\lbrack n\rbrack}}{dt} & {{i\lbrack n\rbrack} < {i\left\lbrack {n + 1} \right\rbrack}} \\ \frac{{- d}\Delta{i\lbrack n\rbrack}}{dt} & {{i\lbrack n\rbrack} > {i\left\lbrack {n + 1} \right\rbrack}} \end{matrix} \right.} & (56) \end{matrix}$

By substituting (56) into (53), the following difference equation is derived for every two consecutive half cycles:

$\begin{matrix} {\frac{d\Delta{i\lbrack n\rbrack}}{dt} = {\frac{{- k}V_{b}}{L_{s}}\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)}} & (57) \end{matrix}$

The control system is designed such that

$\frac{d\Delta{i\lbrack n\rbrack}}{dt}$ (the error) approaches zero by controlling φ[n].

FIG. 12 depicts the exemplary dynamic response of the DAB converter when the GSC scheme of the present invention is used to control φ. According to this figure, the converter is initially operating at steady-state

$\left( {\frac{d\Delta{i\lbrack n\rbrack}}{dt} = 0} \right).$ Then, at the beginning of the half cycle [0], there is a step change in i_(ref) (the new value of i_(ref) is illustrated by an asterisk sign (*) in the figure). The responses of the GSC scheme when the current value at the beginning of the half cycle is positive are shown at the top of FIG. 12 . The responses when the current value at the beginning of the half cycle is negative are shown at the bottom of FIG. 12 . As can be seen, the GSC method for this aspect of the present invention creates a half cycle delay in response to the step change. That is, φ[0]=φ[−1]=φ[−2] and i[−2]=i[−1]=i[0]=i[1]. In the next half cycle (half cycle [1]), the GSC changes φ[1] according to its specific control law, and in turn |i[1]|<|i[2]|. In the half cycle [2], the GSC changes φ[2] such that |i[3]|=|i[2]|. This procedure is continued until |i[n]| is rendered zero. That is, in odd half cycles (half cycle [n=2m+1], where m is a natural number), |i[2m+1]|<|i[2m+2]| and in even half cycles (half cycle [n=2m], where m is a natural number),

$\begin{matrix} \left\{ \begin{matrix} {{{i\left\lbrack {{2m} + 1} \right\rbrack}} = {{i\left\lbrack {2m} \right\rbrack}}} \\ {{\Delta{i\left\lbrack {{2m} + 1} \right\rbrack}} = {\Delta{i\left\lbrack {2m} \right\rbrack}}} \end{matrix} \right. & (58) \end{matrix}$

Thus, the magnitude of the sampled current at the end of the even half cycles [n=2m] is equal to its beginning, which concludes:

$\begin{matrix} \left\{ \begin{matrix} {{\varphi\left\lbrack {2m} \right\rbrack} = {{\varphi^{*}\left\lbrack {2m} \right\rbrack} = {\varphi^{*}\left\lbrack {{2m} + 1} \right\rbrack}}} \\ {{{\Delta\varphi}\left\lbrack {2m} \right\rbrack} = 0} \end{matrix} \right. & (59) \end{matrix}$

The dashed line in FIG. 12 shows the trajectory of the odd and even sampled currents in their transition towards the magnitude of i_(ref) and steady-state operation. In the GSC approach, error reduces by half in every switching cycle. Hence: Δi[n+2]=0.5Δi[n]  (60)

Eq'n (60) results in a fast transient response. A faster response is possible by simply changing the 0.5 factor in Eq'n 60 to any value between 0.5 and 1. However, note that changing this factor may compromise seamless transitions in the dynamic operation. Accordingly, the factor of 0.5 may be preferable, as achieving a balance between fast response and smooth transitions.

Accordingly, for the present invention, the GSC control law for PSM (given by (44)) can be derived based on Eq'ns. (58), (59) and (60). By using (60) and (55),

$\frac{d\Delta{i\lbrack n\rbrack}}{dt}$ is given by:

$\begin{matrix} {\frac{d\Delta{i\lbrack n\rbrack}}{dt} = {\frac{{\Delta{i\left\lbrack {n + 2} \right\rbrack}} - {\Delta{i\lbrack n\rbrack}}}{T_{s}} = {{- {0.5}}\frac{\Delta{i\lbrack n\rbrack}}{T_{s}}}}} & (61) \end{matrix}$

Then, by inserting (61) into (57), the following relationship is derived for each half cycle:

$\begin{matrix} {{{0.5}\frac{\Delta{i\lbrack n\rbrack}}{T_{s}}} = {\frac{kV_{b}}{L_{s}}\left( {{{\Delta\varphi}\lbrack n\rbrack} + {{\Delta\varphi}\left\lbrack {n + 1} \right\rbrack}} \right)}} & (62) \end{matrix}$

Eq'n. (62) for even half cycles results in:

$\begin{matrix} {{{0.5}\frac{\Delta{i\left\lbrack {2m} \right\rbrack}}{T_{s}}} = {\frac{kV_{b}}{L_{s}}\left( {{{\Delta\varphi}\left\lbrack {2m} \right\rbrack} + {{\Delta\varphi}\left\lbrack {{2m} + 1} \right\rbrack}} \right)}} & (63) \end{matrix}$

By rearranging (63), Δφ for odd half cycles is achieved as (from (59), Δφ[2m]=0):

$\begin{matrix} {{{\Delta\varphi}\left\lbrack {{2m} + 1} \right\rbrack} = {{0.5}\frac{f_{s}L_{s}}{kV_{b}}\Delta{i\left\lbrack {2m} \right\rbrack}}} & (64) \end{matrix}$

Eq. (62) results in the same relationship as (64) for odd half cycles. By using (45) when n=2m+1 in (64), the following relationship is derived:

$\begin{matrix} {{{\varphi\left\lbrack {{2m} + 1} \right\rbrack} - {\varphi^{*}\left\lbrack {{2m} + 1} \right\rbrack}} = {{0.5}\frac{f_{s}L_{s}}{kV_{b}}\Delta{i\left\lbrack {2m} \right\rbrack}}} & (65) \end{matrix}$

The control law is derived for odd half cycles by using (59) in (65), as follows:

$\begin{matrix} {{\varphi\left\lbrack {{2m} + 1} \right\rbrack} = {{{0.5}\frac{f_{s}L_{s}}{kV_{b}}\Delta{i\left\lbrack {2m} \right\rbrack}} + {\varphi\left\lbrack {2m} \right\rbrack}}} & (66) \end{matrix}$

The control law for even half cycles is derived similarly. To this end, a relation between φ*[n], φ*[n+1], and Δφ[n] is beneficial. FIG. 13 depicts the steady-state current waveforms associated with φ*[n] and φ*[n+1]. The magnitude of all the sampled currents that correspond to φ*[n] is equal to and the magnitude of all the sampled currents that correspond to φ*[n+1] is equal to |i[n+1]|. Since these waveforms are at steady-state, (8) can be used to find |i[n]| and [|i[n+1]|]:

$\begin{matrix} {\frac{{i\lbrack n\rbrack}}{T_{s}\text{/}2} = {\frac{1}{L_{s}}\left( {{\left( {+ {0.5}} \right)V_{a}} + {\left( {{\varphi^{*}\lbrack n\rbrack} - {0.5}} \right)kV_{b}}} \right)}} & (67) \\ {\frac{{i\left\lbrack {n + 1} \right\rbrack}}{T_{s}\text{/}2} = {\frac{1}{L_{s}}\left( {{\left( {+ {0.5}} \right)V_{a}} + {\left( {{\varphi^{*}\left\lbrack {n + 1} \right\rbrack} - {0.5}} \right)kV_{b}}} \right)}} & (68) \end{matrix}$

Then, by subtracting (67) from (68),

$\begin{matrix} {\frac{{{i\left\lbrack {n + 1} \right\rbrack}} - {{i\lbrack n\rbrack}}}{T_{s}\text{/}2} = {\frac{kV_{b}}{L_{s}}\left( {{\varphi^{*}\left\lbrack {n + 1} \right\rbrack} - {\varphi^{*}\lbrack n\rbrack}} \right)}} & (69) \end{matrix}$

An important property of DAB converters operating in PSM can be derived by combining (46), (48), and (69) as follows: 2Δφ[n]=φ*[n+1]−φ*[n]  (70) That is, the error in a conventional DAB converter, without a GSC control system implemented, grows according to Eq'n. (70).

Eq. (70) for n=2m+1 yields: φ*[2m+1]+Δφ[2m+1]=φ*[2(m+1)]−Δφ[2m+1]  (71)

Combining Eq'n. (45) for n=2m+1, (64), (58), (59), and (71), the following GSC control law for PSM can be derived for even half cycles as follows:

$\begin{matrix} {{\varphi\left\lbrack {2m^{\prime}} \right\rbrack} = {{\varphi\left\lbrack {{2m^{\prime}} - 1} \right\rbrack} + {{0.5}\frac{f_{s}L_{s}}{kV_{b}}\Delta\;{i\left\lbrack {m^{\prime} - 1} \right\rbrack}}}} & (72) \end{matrix}$ where m′=m+1. Thus, using (66) and (72), the general form of the GSC control law for PSM is derived as:

$\begin{matrix} {{\varphi\lbrack n\rbrack} = {{{0.5}\frac{L_{s}f_{s}}{kV_{b}}\Delta{i\left\lbrack {n - 1} \right\rbrack}} + {\varphi\left\lbrack {n - 1} \right\rbrack}}} & (73) \end{matrix}$

The performance of the GSC control is evaluated when there is DC current in the transformer winding during transients. (The DC current is defined as the average of the current for a switching cycle.) The DC current is the result of asymmetry in the current waveform. The asymmetry can occur in six ways, as depicted in FIGS. 14A to 14F. In all cases, the magnitude of |i₁| is different from |i₀|. In order to remove the DC current, the asymmetry between the positive and negative half cycles in current waveform must be eliminated. The GSC scheme ensures that the sampled currents at the beginning of even half cycles (i_(2m)) approach −i_(ref) and the sampled currents at the beginning of odd half cycles (i_(2m+1)) approach +i_(ref) for all six cases. Thus, the GSC scheme effectively eliminates any asymmetry in the current waveform and renders the DC current zero. In FIGS. 14A to 14F, the sampled currents of even half cycles can have three different states as follows:

$\begin{matrix} \left\{ \begin{matrix} {{i\left\lbrack {2m} \right\rbrack} = {i\left\lbrack {{2m} + 2} \right\rbrack}} & {{{if}\mspace{14mu}{\varphi\left\lbrack {{2m} + 1} \right\rbrack}} = {\varphi\left\lbrack {2m} \right\rbrack}} \\ {{i\left\lbrack {2m} \right\rbrack} < {i\left\lbrack {{2m} + 2} \right\rbrack}} & {{{if}\mspace{14mu}{\varphi\left\lbrack {{2m} + 1} \right\rbrack}} > {\varphi\left\lbrack {2m} \right\rbrack}} \\ {{{i\left\lbrack {2m} \right\rbrack} > {i\left\lbrack {{2m} + 2} \right\rbrack}}\ } & {{{if}\mspace{14mu}{\varphi\left\lbrack {{2m} + 1} \right\rbrack}} < {\varphi\left\lbrack {2m} \right\rbrack}} \end{matrix} \right. & (74) \end{matrix}$

From the GSC control law:

${{\varphi\left\lbrack {{2m} + 1} \right\rbrack} - {\varphi\left\lbrack {2m} \right\rbrack}} = {{0.5}\frac{L_{s}f_{s}}{kV_{b}}\Delta{{i\left\lbrack {2m} \right\rbrack}.}}$ Therefore, the states in Eq'n (74) can be rewritten as:

$\begin{matrix} \left\{ \begin{matrix} {{i\left\lbrack {2m} \right\rbrack} = {i\left\lbrack {{2m} + 2} \right\rbrack}} & {{{if}\mspace{14mu}{i\left\lbrack {2m} \right\rbrack}} = {- i_{ref}}} \\ {{i\left\lbrack {2m} \right\rbrack} < {i\left\lbrack {{2m} + 2} \right\rbrack}} & {{{{if}\mspace{14mu}{i\left\lbrack {2m} \right\rbrack}} < {- i_{ref}}}\mspace{14mu}} \\ {{{i\left\lbrack {2m} \right\rbrack} > {i\left\lbrack {{2m} + 2} \right\rbrack}}\ } & {{{if}\mspace{14mu}{i\left\lbrack {2m} \right\rbrack}} > {- i_{ref}}} \end{matrix} \right. & (75) \end{matrix}$

A similar procedure is used to find the three different states for the sampled currents of odd half cycles as follows:

$\begin{matrix} \left\{ \begin{matrix} {{i\left\lbrack {{2m} + 1} \right\rbrack} = {i\left\lbrack {{2m} + 3} \right\rbrack}} & {{{if}\mspace{14mu}{i\left\lbrack {{2m} + 1} \right\rbrack}} = i_{ref}} \\ {{i\left\lbrack {{2m} + 1} \right\rbrack} < {i\left\lbrack {{2m} + 3} \right\rbrack}} & {{{{if}\mspace{14mu}{i\left\lbrack {{2\; m} + 1} \right\rbrack}} < i_{ref}}\mspace{14mu}} \\ {{{i\left\lbrack {{2m} + 1} \right\rbrack} > {i\left\lbrack {{2m} + 3} \right\rbrack}}\ } & {{{if}\mspace{14mu}{i\left\lbrack {{2m} + 1} \right\rbrack}} > i_{ref}} \end{matrix} \right. & (76) \end{matrix}$

Table 3 shows that i[2m] approaches −i_(ref) and i[2m+1] approaches i_(ref) for all six cases in FIG. 14 . Note that this is only the case when the sampled current is delayed by a half cycle (Δi[n]). If the sample current is not delayed; that is, if (Δi[n]) is not used in the GSC formulas, then i[n] will not converge to the reference currents for all six states. Moreover, some states will act as a feed-forward, causing i_(p) to diverge.

TABLE 3 case condition i[2m] condition i[2m + 1] FIG. 14A i[0] > −i_(ref) decreases i[1] < i_(ref) increases FIG. 14B i[0] > −i_(ref) decreases i[1] > i_(ref) decreases FIG. 14C i[0] < −i_(ref) increases i[1] < i_(ref) increases FIG. 14D i[0] < −i_(ref) increases i[1] > i_(ref) decreases FIG. 14E i[0] < −i_(ref) increases i[1] < i_(ref) increases FIG. 14F i[0] > −i_(ref) decreases i[1] > i_(ref) decreases Derivation of GSC for VDM

FIGS. 15A and 15B depict the deviation of i_(p) in the VDM scheme in one switching cycle (i.e., different D_(a)s for each half cycle) when v_(a)>kv_(b). Since v_(a)>kv_(b), D_(a) is used as the control variable, the time intervals t₁ and t₂ must be varied by ΔD_(a) [n+1]/2 so that φ and D_(b) remain constant, when D_(a)[n+1] changes by ΔD_(a)[n]. (This relation can be inferred from (11), (12), (13)). As shown in FIGS. 15A and 15B, the currents are sampled at i[n], i[n+1], and i[n+2], which correspond to the instants when v_(p) changes from zero to +v_(a) or −v_(a). Additionally, i[n+2]=i[n] when D_(a)[n+1]=D_(a)[n].

FIG. 15A shows that, by increasing D_(a), [n+1], i[n+2] also increases. For this figure, the following relationship can be derived:

$\begin{matrix} {\frac{{i\lbrack n\rbrack} - {i\left\lbrack {n + 2} \right\rbrack}}{T_{s}} = {{\left( {m_{2} - m_{3}} \right)\Delta{D_{a}\lbrack n\rbrack}} + {\left( {m_{1} - m_{3}} \right){D\lbrack n\rbrack}\mspace{14mu}{where}}}} & (77) \\ {{\Delta{D_{a}\lbrack n\rbrack}} = {{D_{a}\left\lbrack {n + 1} \right\rbrack} - {D_{a}\lbrack n\rbrack}}} & (78) \end{matrix}$

Then, by using (47), (29), (52), (30), and (77), the following relationship is derived:

$\begin{matrix} {\frac{{- d}{i\lbrack n\rbrack}}{dt} = {\frac{V_{a} + {kV_{b}}}{L_{s}}\Delta{D_{a}\lbrack n\rbrack}}} & (79) \end{matrix}$

In FIG. 15B, i[n+2] decreases as D_(a), [n+1] increases, and if D_(a), [n]=D_(a), [n+1], then i[n+2]=i[n]. The current derivative may be written as follows:

$\begin{matrix} {\frac{d{i\lbrack n\rbrack}}{dt} = {\frac{V_{a} + {kV_{b}}}{L_{s}}\Delta{D_{a}\lbrack n\rbrack}}} & (80) \end{matrix}$

Then, by using (56), (79), and (80) the following difference equation can be achieved:

$\begin{matrix} {\frac{d\Delta{i\lbrack n\rbrack}}{dt} = {{- \frac{V_{a} + {kV_{b}}}{L_{s}}}\Delta{D_{a}\lbrack n\rbrack}}} & (81) \end{matrix}$

By using (60) and (81), the GSC control law for VDM when v_(a)>kv_(b) is derived as:

$\begin{matrix} {\frac{{0.5}\Delta{i\lbrack n\rbrack}}{dt} = {\frac{V_{a} + {kV_{b}}}{L_{s}}\Delta{D_{a}\lbrack n\rbrack}}} & (82) \\ {{D_{a}\left\lbrack {n + 1} \right\rbrack} = {{\frac{{0.5}L_{s}f_{s}}{V_{a} + {kV_{b}}}\Delta{i\lbrack n\rbrack}} + {D_{a}\lbrack n\rbrack}}} & (83) \end{matrix}$

FIGS. 16A and 16B depict the deviation of i_(p) for the VDM scheme in one switching cycle (i.e., different D_(b)s for each half cycle) when v_(a)<kv_(b). Again, the time intervals t₁ and t₂ must be varied by ΔD_(a)[n+1]/2 so that φ and D_(a) remain constant when D_(b) [n+1] changes by ΔD_(b)[n]. The currents are sampled at i[n], i[n+1], and i[n+2], which correspond to the the instants when kv_(s) changes from +kv_(b) or −kv_(a) to zero. Additionally, when D_(a)[n+1]=D_(a)[n], i[n+2]=i[n].

FIG. 16A shows that, by decreasing D_(b)[n+1], i[n+2] also decreases, representing the following relationship:

$\begin{matrix} {\frac{{i\lbrack n\rbrack} - {i\left\lbrack {n + 2} \right\rbrack}}{T_{s}} = {{\left( {m_{4} - m_{2}} \right)\Delta{D_{a}\lbrack n\rbrack}} + {\left( {m_{1} + m_{2}} \right){D_{a}\lbrack n\rbrack}\mspace{14mu}{where}}}} & (84) \\ {{\Delta{D_{b}\lbrack n\rbrack}} = {{D_{b}\left\lbrack {n + 1} \right\rbrack} - {D_{b}\lbrack n\rbrack}}} & (85) \end{matrix}$

By using (47), (29), (52), (31), and (84), the current derivative can be calculated as:

$\begin{matrix} {\frac{{- d}{i\lbrack n\rbrack}}{dt} = {\frac{V_{a} + {kV_{b}}}{L_{s}}\Delta{D_{b}\lbrack n\rbrack}}} & (86) \end{matrix}$

In FIG. 16B, i[n+2] increases as D_(a)[n+1] decreases, and if D_(a)[n]=D_(a)[n+1], then i[n+2]=i[n]. The current derivative can be written as:

$\begin{matrix} {\frac{d{i\lbrack n\rbrack}}{dt} = {\frac{V_{a} + {kV_{b}}}{L_{s}}\Delta{D_{b}\lbrack n\rbrack}}} & (87) \end{matrix}$

Then, using (56), (86), and (87) the following difference equation is derived:

$\begin{matrix} {\frac{d\;\Delta\;{i\lbrack n\rbrack}}{dt} = {{- \frac{V_{a} + {kV}_{b}}{L_{s}}}\Delta\;{D_{b}\lbrack n\rbrack}}} & (88) \end{matrix}$

By using (60) and (88), the GSC control law for VDM when v_(a)<kv_(b) is given by:

$\begin{matrix} {\frac{0.5\Delta\;{i\lbrack n\rbrack}}{dt} = {\frac{V_{a}{kV}_{b}}{L_{s}}\Delta\;{D_{b}\lbrack n\rbrack}}} & (89) \\ {{D_{b}\left\lbrack {n + 1} \right\rbrack} = {{\frac{0.5L_{s}f_{s}}{V_{a} + {kV}_{b}}\Delta\;{i\lbrack n\rbrack}} + {D_{b}\lbrack n\rbrack}}} & (90) \end{matrix}$ Derivation of GSC for TCM

FIGS. 17A and 17B depict the deviation of i_(p) for the TCM scheme in one switching cycle (i.e., different φ[n]s for each half cycle) when v_(a)>kv_(b). The currents are sampled at i[n], i[n+1], and i[n+2], which correspond to the instants when v_(p) changes from +v_(a) or −v_(a) to zero. Again, i[n+2]=i[n] when D_(a), [n+1]=D_(a)[n]. FIG. 17A shows that by increasing φ[n+1], i[n+2] decreases and the following relationship can be derived:

$\begin{matrix} {{\frac{{i\lbrack n\rbrack} - {i\left\lbrack {n + 2} \right\rbrack}}{T_{s}} = {{{{- m_{s}}\Delta\;{\varphi_{\Delta}\lbrack n\rbrack}} + {m_{2}\Delta\;{D_{a}\lbrack n\rbrack}}} = {{- 2}m_{3}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}}}{where}} & (91) \\ {{{\Delta\varphi}_{\Delta}\lbrack n\rbrack} = {{\varphi\left\lbrack {n + 1} \right\rbrack} - {\varphi\lbrack n\rbrack}}} & (92) \end{matrix}$

By using (52), (30), (91), and (92), the current derivative is calculated as:

$\begin{matrix} {\frac{- {{di}\lbrack n\rbrack}}{dt} = {\frac{2{kV}_{b}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (93) \end{matrix}$

In FIG. 17B, i[n+2] increases as φ[n+1] increases, and if φ[n]=φ[n+1], then i[n+2]=i[n]. The current derivative can be written as:

$\begin{matrix} {\frac{{di}\lbrack n\rbrack}{dt} = {\frac{2{kV}_{b}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (94) \end{matrix}$

By using (56), (91), and (94), the following difference equation can be determined:

$\begin{matrix} {\frac{d\;\Delta\;{i\lbrack n\rbrack}}{dt} = {{- \frac{2{kV}_{b}}{L_{s}}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (95) \end{matrix}$

By using (60) and (95), the GSC control law for TCM when v_(a)>kv_(b) can be derived as follows:

$\begin{matrix} {\frac{0.5\Delta\;{i\lbrack n\rbrack}}{dt} = {\frac{2{kV}_{b}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (96) \\ {{\varphi\left\lbrack {n + 1} \right\rbrack} = {{\frac{0.5L_{s}f_{s}}{2{kV}_{b}}\Delta\;{i\lbrack n\rbrack}} + {\varphi\lbrack n\rbrack}}} & (97) \end{matrix}$

FIGS. 18A and 18B depict the deviation of i_(p) for the TCM scheme in one switching cycle (i.e., different φ[n]s for each half cycle) when v_(a)<kv_(b). The currents are sampled at i[n], i[n+1], and i[n+2], which correspond to the instants when kv_(s) changes from zero to +kv_(b) or −kv_(b). Again, i[n+2]=i[n] when D_(a)[n+1]=D_(a)[n]. FIG. 18A shows that by increasing φ[n+1], i[n+2] decreases. The following relationship can be derived:

$\begin{matrix} {\frac{{i\lbrack n\rbrack} - {i\left\lbrack {n + 2} \right\rbrack}}{T_{s}} = {{{m_{4}\Delta\;{\varphi_{\Delta}\lbrack n\rbrack}} + {m_{2}\Delta\;{D_{b}\lbrack n\rbrack}}} = {2m_{4}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}}} & (98) \end{matrix}$

By using (52), (30), (98), and (92), the current derivative is calculated as:

$\begin{matrix} {\frac{- {{di}\lbrack n\rbrack}}{dt} = {\frac{2V_{a}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (99) \end{matrix}$

In FIG. 18B, i[n+2] increases as φ[n+1] increases and if φ[n]=φ[n+1], then i[n+2]=i[n]. The current derivative can then be written as:

$\begin{matrix} {\frac{{di}\lbrack n\rbrack}{dt} = {\frac{2V_{a}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (100) \end{matrix}$

By using (56), (99), and (100), the following difference equation is given:

$\begin{matrix} {\frac{d\;\Delta\;{i\lbrack n\rbrack}}{dt} = {{- \frac{{- 2}V_{a}}{L_{s}}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (101) \end{matrix}$

By using (60) and (101), the GSC control law for TCM when v_(a)<kv_(b) can be derived as:

$\begin{matrix} {\frac{0.5\Delta\;{i\lbrack n\rbrack}}{dt} = {\frac{2V_{a}}{L_{s}}{{\Delta\varphi}_{\Delta}\lbrack n\rbrack}}} & (102) \\ {{\varphi\left\lbrack {n + 1} \right\rbrack} = {{\frac{0.5L_{s}f_{s}}{2V_{a}}\Delta\;{i\lbrack n\rbrack}} + {\varphi\lbrack n\rbrack}}} & (103) \end{matrix}$ Stability and Robustness of the GSC Control System

The well-known Lyapunov function can be used to investigate stability and robustness of differential equations. In the current case, the Lyapunov function is defined as: V=Δi _(p,t) ₀ ² [k]  (104)

Additionally, note that the control laws given above can be derived based on Eq'n (61). Therefore, the following relationship in the current error holds when GSC control is used: Δi[n+1]=0.5Δi[n]  (105)

The difference of the Lyapunov function can then be derived as follows:

$\begin{matrix} \begin{matrix} {{{V\lbrack n\rbrack} - {V\left\lbrack {n - 1} \right\rbrack}} = {{\Delta\;{i^{2}\lbrack n\rbrack}} - {\Delta\;{i^{2}\left\lbrack {n - 1} \right\rbrack}}}} \\ {= {\left( {0.5\Delta\;{i\lbrack n\rbrack}} \right)^{2} - {\Delta\;{i^{2}\left\lbrack {n - 1} \right\rbrack}}}} \\ {= {{- 0.75}\Delta\;{i^{2}\lbrack n\rbrack}}} \end{matrix} & \lbrack 106\rbrack \end{matrix}$ which shows that V[n]−V[n−1] is always negative. Therefore, Δi is asymptotically stable at origin, meaning Δi converges to zero at steady-state.

In practice, there may be uncertainties in the system. As an example, the value of external series inductance might vary during different operations. Also, the voltage measurement of the DC bus might have some deviation from its real value. A robust control system preferably provides stability even in light of such uncertainties and fluctuations. The GSC control laws of the present invention depend on the transformer ratio, output voltage, switching period, and the series inductance. By taking into account the percentage error of the series inductance (ΔL_(s)%), the relation between the two consecutive errors can be derived as follows: Δi _(p) [k+1]=(0.5−0.5θL _(s)%)Δi _(p) [k]  (107)

Rewriting the difference equation for the Lyapuov function thus yields: V[k]−V[k−1]=¼(ΔL _(s)%²−2ΔL _(s)%−3)Δi _(p,t) ₀ ² [k]  (108)

The above equation is negative if −100%<ΔL _(s)%<300%→−L _(s) <ΔL _(s)<3L _(s)  (109)

Therefore, if the perturbations of L_(s) are within the range in Eq'n (109), the control system is still asymptotically stable. Similar results can be achieved for variations in switching frequency.

The perturbation in sensing the DC bus voltage can be investigated by taking into account the percentage error (ΔV %) when sensing the DC bus voltage. The relationship between the two consecutive errors can be derived as follows:

$\begin{matrix} {{\Delta\;{i_{p}\left\lbrack {k + 1} \right\rbrack}} = {\left( {1 - \frac{0.5}{1 + {\Delta\; v_{b}\%}}} \right)^{2}\Delta\;{i_{p}\lbrack k\rbrack}}} & (110) \end{matrix}$ leading to the following Lyapunov function:

$\begin{matrix} {{{V\lbrack k\rbrack} - {V\left\lbrack {k - 1} \right\rbrack}} = {\left( {\left( {1 - \frac{0.5}{1 + {\Delta\; v_{b}\%}}} \right)^{2} - 1} \right)\Delta\;{i_{p,t_{0}}^{2}\lbrack k\rbrack}}} & (111) \end{matrix}$

The above equation is negative if −75%<Δv _(b)→  (112) −0.75v _(b) <Δv _(b)  (113)

Therefore, if the perturbations of v_(b) are compliant with the range in (113), then the control system is asymptotically stable. Thus, the GSC control system of the present invention illustrates high robustness against system uncertainties and fluctuations in the system.

The stability and robustness of the GSC control law for a general case with different scale factors (λ) can be written Δi[n]=(1−λ)Δi[n−1]  (114)

Following a similar procedure as that above for the scale factor of λ=0.5, it can be derived that when the scale factor is within 0<λ<2, the error reduces in a geometric sequence progression towards zero with common ratio of 1−λ.

SIMULATION AND EXAMPLE

The performance of the control system according to one aspect of the present invention was verified by simulation results, using the prototype of FIG. 2 . Again, as should be clear, nothing in this example simulation should be taken as limiting the invention in any way.

PSIM™ simulation software was used to conduct simulations for a DAB DC/DC converter with specifications given in Table 4.

TABLE 4 Symbol Parameter Value V_(a) Input Voltage 100 V_(DC) V_(b) Output Voltage 150 V_(DC) f_(s) Switching Frequency 100 kHz L_(s) Series Inductor 10 μH C_(A) Input Capacitance 160 μF C_(B) Output Capacitor 160 μF n Transformer's Turns 0.9 Ratio S MOSFETs SQM10250E_GE3

As an example, the control system was implemented inside a Cyclone™ IV FPGA (field-programmable gate array). VHSIC Hardware Description Language was used to program the FPGA. A phase-locked loop block (“PLL block) inside the FPGA was used to boost the clock of the external oscillator from 24 MHz to 120 MHz. The block diagram of FIG. 2 shows a power flow from port A to port B. The analogue-to-digital (ADC) devices used were ADS7884™ devices. The current transformer used was PN: P0581N, optimized for frequencies of 50-500 kHz. The corresponding ADC for i_(p)[n] performs sampling every half cycle. This timing is controlled by a sampling signal (ss) which is generated inside the modulator based on the values in Table 4. ADS7884™ devices are capable of sampling 3 MSPS, and thus can support the required half cycle (200 kSPS) sensing for the i_(p) value. The sampled currents were kept for every three consecutive half cycles of (i[n]). Based on this calculated power level, the modulator also operates in three different modes: TCM, VDM, and PSM. These modulation schemes were constructed using a Mealy state machine.

It should, however, be clear that the digital control system as explained above may be implemented using various platforms such as FPGA, digital signal processors (“DSP”), and others.

FIGS. 19A to 19D depicts the transient response of the GSC control system. Specifically, FIG. 19A depicts the current waveforms i_(p) and I_(b) for a positive and negative step change in the inner loop reference current. At t=3 ms, the reference current is changed such that i_(b) changes from 9 A to 6 A. Then, at t=5 ms, the reference current is changed such that i_(b) changes from 6 A to 10 A. In both cases, i_(p) changes symmetrically in response to step change in reference current.

FIG. 19B depicts the transition of current at t=5 ms in enlarged scale. According to this figure, i_(p) shows a symmetrical growth. FIG. 18C depicts the current error during this time interval. As can be seen, current error reduces by half in every switching cycle (as seen in Eq'n (60)). FIG. 19D depicts the smooth transition of the control variable (φ) in its trend towards steady state value of 0.19.

FIGS. 20A to 20C depict the control system performance when the series inductor is varied by 100% (L_(p)=20 μH). In this scenario, GSC shows a slower transient response compared to L=10 μH. Further, as can be seen, the GSC control system reduces the current error to zero, which shows the high robustness of the proposed control against uncertainties and fluctuations of the inductor.

FIG. 21 is a plot showing the transient response of the GSC control system of the present invention, as compared to conventional PI controllers for DAB converters. As can be seen, the present invention provides faster response than conventional schemes.

FIG. 22 illustrates the transient operation of the converter in conventional application, where the control variables are changed every switching cycle (i.e., symmetric half cycle modulation scheme is employed). As can be seen, in this scenario, i_(p) changes asymmetrically and the peak current can potentially rise to high values, causing temporary saturation of the transformer, as discussed above.

FIG. 23 depicts the steady-state operation of the converter when power is transferred from port B to port A. It can be seen that in this scenario, φ is negative. The steady state equation of power flow is the same as in power flow from port A to port B given in (10), but with negative sign. That is, reversing the direction of power flow in the system of FIG. 2 only changes the sign term, while the rest of the relations derived above remain the same.

Referring now to FIG. 24 , a flowchart illustrating a method according to one aspect of the invention is illustrated. The transformer primary current is measured every half switching cycle and modified by the feedback unit (step 2400). The inner loop reference signal is subtracted from the modified feedback signal to create the inner loop error (step 2410). The error is used by the GSC compensator (the inner loop compensator) to create the control parameters for the modulator (step 2420). Then, based on those control parameters, a modulation technique is applied to change the switching signals (step 2430). The modulation technique is one of PSM, VDM, or TCM, as detailed above. The modified switching signals changes the transformer primary current until it reaches the desired inner loop reference current (inner loop error becomes zero). The resulting feedback loop reduces error and increases reliability and efficiency of the DAB converter over a broad range of input conditions.

As noted above, for a better understanding of the present invention, the following references may be consulted:

-   [1] Krismer and Kolar, “Closed Form Solution for Minimum Conduction     Loss Modulation of DAB Converters,” IEEE Transactions on Power     Electronics, vol. 27, DOI 10.1109/TPEL.21011.2157976, no. 1, pp.     174-188, January 2012. -   [2] F. Krismer and J. W. Kolar, “Accurate Small-Signal Model for the     Digital Control of an Automotive Bidirectional Dual Active Bridge,”     IEEE Transactions on Power Electronics, vol. 24, DOI     10.1109/TPEL.2009.2027904, no. 12, pp. 2756-2768, December 2009. -   [3] F. Krismer and J. W. Kolar, “Accurate Power Loss Model     Derivation of a High-Current Dual Active Bridge Converter for an     Automotive Application,” IEEE Transactions on Industrial     Electronics, vol. 57, DOI 10.1109/TIE.2009.2025284, no. 3, pp.     881-891, March 2010. -   [4] F. Krismer, S. Round, and J. W. Kolar, “Performance optimization     of a high current dual active bridge with a wide operating voltage     range,” in 2006 37th IEEE Power Electronics Specialists Conference,     DOI 10.1109/pesc.2006.1712096, pp. 1-7, June 2006.

It should be clear that the various aspects of the present invention may be implemented as software modules in an overall software system. As such, the present invention may thus take the form of computer executable instructions that, when executed, implement various software modules with predefined functions.

Further, as used herein, the expression “at least one of X and Y” means and should be construed as meaning “X or Y or both X and Y”.

A person understanding this invention may now conceive of alternative structures and embodiments or variations of the above all of which are intended to fall within the scope of the invention as defined in the claims that follow. 

We claim:
 1. A control system for a dual active bridge (DAB) DC/DC converter, said control system comprising: a feedback unit; a compensator; and a modulator, wherein said feedback unit measures a transformer current from a bridge component of said DAB converter as input and wherein an inner loop reference current is subtracted from an output of said feedback unit; wherein an output of said subtraction is passed to said compensator; wherein said compensator determines control parameters for said modulator; wherein said compensator determines control parameters using a geometric-sequence-control (GSC) method; and wherein said modulator applies a modulation technique based on said control parameters to change a switching pattern to thereby control said transformer current and to thereby control a power flow in said circuit.
 2. The control system according to claim 1, wherein said modulation technique is one of: phase-shift modulation (PSM), variable duty cycle modulation (VDM), and triangular current mode modulation (TCM).
 3. The control system according to claim 1, wherein said feedback unit samples said transformer current once every half switching cycle.
 4. The control system according to claim 1, wherein said compensator updates said control parameters once every half switching cycle.
 5. The control system according to claim 1, wherein said modulator updates said switching pattern every half switching cycle.
 6. The control system according to claim 1, wherein said GSC method is based on an error in said inner loop reference current.
 7. The control system according to claim 1, wherein said GSC method is applied such that an error in said inner loop reference current decreases in a geometric sequence progression over successive half switching cycle samplings, and wherein said control parameters are by-products of said GSC method.
 8. The control system according to claim 1, wherein said control parameters comprise at least one of: a phase shift of the converter, a duty cycle of said bridge component, and a duty cycle of another bridge component of said DAB converter.
 9. The control system according to claim 1, wherein said system conforms to at least one of the following conditions; when a power level within said circuit is below a first threshold, said modulation technique is triangular current modulation (TCM); when said power level is between said first threshold and a second threshold, said modulation technique is variable duty cycle modulation (VDM), said second threshold being higher than said first threshold; and when said power level is above said second threshold, said modulation technique is phase-shift modulation (PSM).
 10. A method for controlling a power flow within a circuit comprising a dual active bridge (DAB) DC/DC converter, said method comprising the steps of: receiving a current from a bridge component of said DAB converter as input for a compensator; measuring a current from a transformer component of said DAB converter; based on said current, determining control parameters for a modulator; determining said control parameters by applying a geometric-sequence-control (GSC) method; and using said modulator, applying a modulation technique based on said control parameters, to thereby modify said current and to thereby control said power flow in said circuit.
 11. The method according to claim 10, wherein said modulation technique is one of phase-shift modulation (PSM), variable duty cycle modulation (VDM), and triangular current mode modulation (TCM).
 12. The method according to claim 10, wherein said GSC method is based on inner loop current error.
 13. The method according to claim 10, wherein said control parameters are determined by a compensator.
 14. The method according to claim 13, wherein said compensator updates said control parameters once every half switching cycle.
 15. The method according to claim 10, wherein said GSC method is applied such that an inner loop current error decreases in a geometric sequence progression over successive half switching cycle samplings, and wherein said control parameters are by-products of said GSC method.
 16. The method according to claim 10, wherein said control parameters comprise at least one of: a phase shift of the converter, a duty cycle of said bridge component, and a duty cycle of another bridge component of said DAB converter.
 17. The method according to claim 10, wherein said method conforms to at least one of the following conditions: when a power level within said circuit is below a first threshold, said modulation technique is triangular current mode modulation (TCM); when said power level is between said first threshold and a second threshold, said modulation technique is variable duty cycle modulation (VDM), said second threshold being higher than said first threshold; or when said power level is above said second threshold, said modulation technique is phase-shift modulation (PSM).
 18. Non-transitory computer-readable media having encoded thereon computer-readable and computer-executable instructions that, when executed, implement a method for controlling a power flow within a circuit comprising a dual active bridge (DAB) DC/DC converter, said method comprising the steps of: receiving a current from a bridge component of said DAB converter as input for a compensator; measuring a current from a transformer component of said DAB converter; based on said current, determining control parameters for a modulator; determining said control parameters by applying a geometric-sequence-control (GSC) method; and using said modulator, applying a modulation technique based on said control parameters, to thereby modify said current and to thereby control said power flow in said circuit. 